Itanium (pronounced /aɪˈteɪniəm/ , eye--nee-əm ) is a family of 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64 ). The processors are marketed for use in enterprise servers and high-performance computing systems. The architecture originated at Hewlett-Packard (HP), and was later jointly developed by HP and Intel.
Intended to push performance beyond existing designs, Itanium departed dramatically from Intel's legacy x86 and other architectures. The Itanium architecture is based on explicit instruction-level parallelism, in which the compiler makes the decisions about which instructions to execute in parallel. By contrast, other superscalar architectures depend on elaborate processor circuitry to keep track of instruction dependencies during runtime. This alternative approach helps Itanium processors execute up to six instructions per clock cycle, as of 2009.
Market reception
After a protracted development process with many delays the first Itanium processor, codenamed Merced , was released in 2001, and more powerful Itanium processors have been released periodically. HP produces most Itanium-based systems, but several other manufacturers also offer systems based on Itanium. As of 2008, Itanium is the fourth-most deployed microprocessor architecture for enterprise-class systems, behind x86-64, IBM POWER, and SPARC. Intel released the current Itanium version, codenamed Montvale , in November 2007. The follow-on, a quad-core processor codenamed Tukwila , was itself originally planned for release in 2007 but is now announced to ship to OEMs in the first quarter of 2010.
When first released in 2001, Itanium's performance, compared to better established RISC and CISC processors, was disappointing. Although remaining in development and having reached a limited success in the niche of high-end computing, it had been hoped to evolve into a replacement for lower end applications of the original x86 architecture. Instead, emulation to run existing applications and operating systems proved to be a costly obstacle. AMD chose a different direction designing the less radical, and more compatible x86-64 extension to which Microsoft had committed — leaving no choice for Intel. These designs can natively run legacy code by taking a switch, and offer 64-bit performance and memory addressing without special compilers.
The Itanium is only one of a number of chip designs, including the earlier Intel iAPX 432 and other RISC designs which have failed to replace the much-criticized but steadily refined and backwards-compatible x86 series which have come to dominate all but the largest or smallest computing applications. Journalist John C. Dvorak, commenting in 2009 on the history of the Itanium processor, said "This continues to be one of the great fiascos of the last 50 years" in an article titled "How the Itanium Killed the Computer Industry". Its sales were so disastrously below expectations that the appellation of " Itanic " has been applied to the franchise, invoking the ill-fated ocean liner RMS Titanic . Tech columnist Ashlee Vance commented that the delays and underperformance "turned the product into a joke in the chip industry."
History
Development: 1989–2000
In 1989, HP determined that reduced instruction set computer (RISC) architectures were approaching a processing limit at one instruction per cycle. HP researchers investigated a new architecture, later named explicitly parallel instruction computing (EPIC), that allows the processor to execute multiple instructions in each clock cycle. EPIC implements a form of very long instruction word (VLIW) architecture, in which a single instruction word contains multiple instructions. With EPIC, the compiler determines in advance which instructions can be executed at the same time, so the microprocessor simply executes the instructions and does not need elaborate mechanisms to determine which instructions to execute in parallel. The goal of this approach is two-fold: first, to enable deeper inspection of the code to identify additional opportunities for parallel execution; and, second, to simplify processor design and reduce energy consumption by eliminating the need for runtime scheduling circuitry.
HP determined that it was no longer cost-effective for individual enterprise systems companies such as itself to develop proprietary microprocessors, so HP partnered with Intel in 1994 to develop the IA-64 architecture, which derived from EPIC. Intel was willing to undertake a very large development effort on IA-64 in the expectation that the resulting microprocessor would be used by the majority of enterprise systems manufacturers. HP and Intel initiated a large joint development effort with a goal of delivering the first product, Merced, in 1998.
During development, Intel, HP, and industry analysts predicted that IA-64 would dominate in servers, workstations, and high-end desktops, and eventually supplant RISC and complex instruction set computer (CISC) architectures for all general-purpose applications. Compaq and Silicon Graphics decided to abandon further development of the Alpha and MIPS architectures respectively in favor of migrating to IA-64.
Several groups developed operating systems for the architecture, including Microsoft Windows, Linux, and UNIX variants such as HP-UX, Solaris, Tru64 UNIX, and Monterey/64 (the last three were canceled before reaching the market). By 1997, it was apparent that the IA-64 architecture and the compiler were much more difficult to implement than originally thought, and the delivery of Merced began slipping. Technical difficulties included the very high transistor counts needed to support the wide instruction words and the large caches. There were also structural problems within the project, as the two parts of the joint team used different methodologies and had slightly different priorities. Since Merced was the first EPIC processor, the development effort encountered more unanticipated problems than the team was accustomed to. In addition, the EPIC concept depends on compiler capabilities that had never been implemented before, so more research was needed.
Intel announced the official name of the processor Itanium , on October 4, 1999. Within hours, the name Itanic had been coined on a Usenet newsgroup, a reference to Titanic , the "unsinkable" ocean liner which sank in 1912. Itanic has since often been used by The Register , Scott McNealy, and others, implying that the multibillion dollar investment in Itanium—and the tremendous early hype—would be followed by its relatively quick demise.
Itanium (Merced): 2001
By the time Itanium was released in June 2001, its performance was not superior to competing RISC and CISC processors. Itanium competed at the low-end (primarily 4-CPU and smaller systems) with servers based on x86 processors, and at the high end with IBM's POWER architecture and Sun Microsystems' SPARC architecture. Intel repositioned Itanium to focus on high-end business and HPC computing, attempting to duplicate x86's successful "horizontal" market (i.e., single architecture, multiple systems vendors). The success of this initial processor version was limited to replacing PA-RISC in HP systems, Alpha in Compaq systems and MIPS in SGI systems, though IBM also delivered a supercomputer based on this processor. POWER and SPARC remained strong, while the 32-bit x86 architecture continued to grow into the enterprise space. With economies of scale fueled by its enormous installed base, x86 has remained the preeminent "horizontal" architecture in enterprise computing.
Only a few thousand systems using the original Merced Itanium processor were sold, due to relatively poor performance, high cost and limited software availability. Recognizing that the lack of software could be a serious problem for the future, Intel made thousands of these early systems available to independent software vendors (ISVs) to stimulate development. HP and Intel brought the next-generation Itanium 2 processor to market a year later.
Itanium 2: 2002–2010
The Itanium 2 processor was released in 2002, and was marketed for enterprise servers rather than for the whole gamut of high-end computing. The first Itanium 2, code-named McKinley , was jointly developed by HP and Intel. It relieved many of the performance problems of the original Itanium processor, which were mostly caused by an inefficient memory subsystem. McKinley contained 221 million transistors, of which 25 million were for logic, measured 19.5 mm by 21.6 mm (421 mm 2 ) and was fabricated in a 180 nm, bulk CMOS process with six layers of aluminium metallization.
In 2003, AMD released the Opteron, which implemented its 64-bit architecture (x86-64). Opteron gained rapid acceptance in the enterprise server space because it provided an easy upgrade from x86. Intel responded by implementing x86-64 in its Xeon microprocessors in 2004. Intel released a new Itanium 2 family member, codenamed Madison , in 2003. Madison used
ATI bolsters Intel® Itanium® 2 processor with ...
ATI bolsters Intel® Itanium® 2 processor with optimized software drivers Itanium Architecture complements ATI's industry-leading graphics capabilities
HPC SnowStorm - a new HP Itanium 2 Cluster at ...
Home: Info: Staff: Hardware: Software: SnowStorm - a new HP Itanium 2 Cluster at UiT. As a result of the collaboration between UiT and HP, and within NOTUR, a new Itanium 2 based Linux ...
Intel Itanium
64 bit Processors (Xeon, Itanium, Itanium 2) ISA; EPIC; Predicated Execution (Branch Prediction) Software Pipelining
Intel® Itanium® 2 Processor Reference Manual for ...
Intel® Itanium® 2 Processor Reference Manual for Software Development and Optimization This document describes microarchitectural details of the Intel® Itanium® 2 processor ...
How to Use Code from the Intel® Itanium® Processor on ...
How to Use Code from the Intel® Itanium® Processor on the Itanium® 2 Processor. Submit New Article
HP Itanium® 2-Based Systems Now Available - Intel ...
Created jointly by Intel and HP, the Itanium® 2 Development Reference Platform for ISVs is a tested and integrated bundle of Intel Itanium 2 processor-based servers and ...
DSstar: SAS READIES SOFTWARE FOR INTEL ITANIUM 2 ...
... SeUGI) 20 conference in Paris, attended by more than 2,000 SAS customers from around the world. SAS and Intel will showcase Release 9.0 of SAS software running on Itanium 2-based ...
Introduction to Micro arc hitectur al Optimization for ...
ii This manual as well as the software described in it is furnished under license and may only be used or copied in accordance with the terms of the license.
Intel® Itanium® 2 Processor - Tools & Software
A listing of Tools & Software for the Intel® Itanium® 2 processor
OpenEye Scientific Software | Itanium 2 Press Release
OpenEye Scientific Software based in Santa Fe, NM provides software, programs, and toolkits for structure based drug design.