The Celeron brand has been used by Intel for several distinct ranges of x86 CPUs targeted at budget personal computers. Celeron processors can run all IA-32 computer programs, but their performance is somewhat lower when compared to similar CPUs with higher-priced Intel CPU brands. For example, the Celeron brand will often have less cache memory, or have advanced features purposely disabled. These missing features have had a variable impact on performance. In some cases, the effect was significant and in other cases the differences were relatively minor. Many of the Celeron designs have achieved a very high "bang for the buck", while at other times, the performance difference has been noticeable. This has been the primary justification for the higher cost of other Intel CPU brands versus the Celeron range.
Introduced in April 1998, the first Celeron branded CPU was based on the Pentium II branded core. Subsequent Celeron branded CPUs were based on the Pentium III, Pentium 4, Pentium M, and Core 2 Duo branded processors. The latest Celeron design (as of January 2008) is based on the Core 2 Duo (Allendale). This design features independent processing cores (CPUs), but with only 25% as much cache memory as the comparable Core 2 Duo offering.
Background
As a product concept, the Celeron was introduced in response to Intel's loss of the low-end market, in particular to the Cyrix 6x86, the AMD K6, and the IDT Winchip. Intel's existing low-end product, the Pentium MMX, was no longer performance competitive at 233 MHz. Although a faster Pentium MMX would have been a lower-risk strategy, the industry standard Socket 7 platform hosted a market of competitor CPUs which could be drop-in replacements for the Pentium MMX. Instead, Intel pursued a budget part that was pin-compatible with their high-end Pentium II product, using the Pentium II's (Slot 1) interface. The Celeron was used in many low end machines and, in some ways, became the standard for non gaming computers.
Celeron (P6)
Covington
The first Covington Celeron was essentially a 266 MHz Pentium II manufactured without any secondary cache at all. Covington also shared the 80523 product code of Deschutes. Although clocked at 266 or 300 MHz (frequencies 33 or 66 MHz higher than the desktop version of the Pentium w/MMX), the cacheless Celerons were a good deal slower than the parts they were designed to replace. Substantial numbers were sold on first release, largely on the strength of the Intel name, but the Celeron quickly achieved a poor reputation both in the trade press and among computer professionals. The initial market interest faded rapidly in the face of its poor performance and with sales at a very low level, Intel felt obliged to develop a substantially faster replacement as soon as possible. Nevertheless the first Celerons were quite popular among some overclockers, for their flexible overclockability and reasonable price. Covington was only manufactured in Slot 1 SEPP format.
Mendocino
The Mendocino Celeron, launched August 24, 1998, was the first retail CPU to use on-die L2 cache. Whereas Covington had no secondary cache at all, Mendocino included 128 KB of L2 cache running at full clock rate. The first Mendocino-core Celeron was clocked at a then-modest 300 MHz but offered almost twice the performance of the old cacheless Covington Celeron at the same clock rate. To distinguish it from the older Covington 300 MHz, Intel called the Mendocino core Celeron 300A . Although the other Mendocino Celerons (the 333 MHz part, for example) did not have an A appended, some people call all Mendocino processors Celeron-A regardless of clock rate.
The new Mendocino-core Celeron was a good performer from the outset. Indeed, most industry analysts regarded the first Mendocino-based Celerons as too successful—performance was sufficiently high to not only compete strongly with rival parts, but also to attract buyers away from Intel's high-profit flagship, the Pentium II. Overclockers soon discovered that, given a high-end motherboard, the Celeron 300A could run reliably at 450 MHz. This was achieved by simply increasing the Front Side Bus (FSB) clock rate from the stock 66 MHz to the 100 MHz clock of the Pentium II. At this frequency, the Mendocino Celeron rivaled the fastest x86 processors available.
At the time on-die cache was difficult to manufacture; especially L2 as more of it is needed to attain an adequate level of performance. A benefit of on-die cache is that it operates at the same clock rate as the CPU. All other Intel CPUs at that time used motherboard mounted or slot mounted secondary L2 cache, which was very easy to manufacture, cheap, and simple to enlarge to any desired size (typical cache sizes were 512 KB or 1 MB), but they carried the performance penalty of slower cache performance, typically running the FSB at a frequency of 60 to 100 MHz for motherboard mounted L2 cache. The Pentium II's 512 KB of L2 cache was implemented with moderately high-performance L2 cache chips mounted on a special-purpose board alongside the processor itself, running at half the processor's performance and communicating with the CPU through a special back-side bus.
Over time, newer Mendocino processors were released at 333, 366, 400, 433, 466, 500, and 533 MHz. The Mendocino Celeron CPU came only designed for a 66 MHz frontside bus, but this would not be a serious performance bottleneck until clock rates reached higher levels.
The Mendocino Celerons also introduced new packaging. When the Mendocinos debuted they came in both a Slot 1 SEPP and Socket 370 PPGA package. The Slot 1 form had been designed to accommodate the off-chip cache of the Pentium II and had mounting problems with motherboards. Because all Celerons are a single-chip design, however, there was no reason to retain the slot packaging for L2 cache storage, and Intel discontinued the Slot 1 variant: beginning with the 466 MHz part, only the PPGA Socket 370 form was offered. (Third-party manufacturers made motherboard slot-to-socket adapters (nicknamed Slotkets) available for a few dollars, which allowed, for example, a Celeron 500 to be fitted to a Slot 1 motherboard.) One interesting note about the PPGA Socket 370 Mendocinos is they supported symmetric multiprocessing (SMP), and there was at least one motherboard released (the ABIT BP6) which took advantage of this fact.
The Mendocino also came in a mobile variant, with clock rates of 266, 300, 333, 366, 400, 433 and 466 MHz.
In Intel's "Family/Model/Stepping" scheme, Mendocino CPUs are family 6, model 6 and their Intel product code is 80524. These identifiers are shared with the related Dixon Mobile Pentium II variant.
Coppermine-128
The next generation Celeron was the Coppermine-128 (sometimes known as the Celeron II ). These were a derivative of Intel's Coppermine Pentium III and were released on March 29, 2000. Like the Mendocino , the Celeron-128 used 128 KB of on-chip L2 cache and was (initially) restricted to a 66 MHz Front Side Bus Speed, But the big news was the addition of SSE instructions, due to the new Coppermine core. Besides only having half the L2 cache (128 KB instead of 256 KB) and the lower FSB (66-100 MHz instead of 100-133 MHz), the Coppermine Celeron was identical to the Coppermine Pentium III.
All Coppermine-128s were produced in the same FCPGA Socket 370 format that most Coppermine Pentium III CPUs used. These Celeron processors began at 533 MHz and continued through 566, 600, 633, 666 (Intel named it the 667) , 700, 733, and 766 MHz. Because of the limitations of the 66 MHz bus, there were diminishing returns on performance as clock rates increased. On January 3, 2001, Intel switched to a 100 MHz bus with the launch of the 800 MHz Celeron, resulting in a significant performance-per-clock improvement. All Celeron-128 CPUs from 800 MHz and higher use the 100 MHz front side bus. Various models were made at 800, 850, 900, 950, 1000, and 1100 MHz.
In Intel's "Family/Model/Stepping" scheme, Coppermine Celerons and Pentium IIIs are family 6, model 8 and their Intel product code is 80526.
Tualatin-256
These Celeron processors, released initially at 1.2 GHz on October 2, 2001, were based on the Pentium III Tualatin core and made with a 0.13 micrometer process for the FCPGA 2 socket 370. They were nicknamed Tualeron — a portmanteau of the words Tualatin and Celeron. Some software and users refer to the chips as Celeron-S
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